Method of making gate array base cell

Details Method of making gate array base cell Method of making gate array base cell

1991-04-08

1993-06-08

Thomas, Tom

Fishing, trapping, and vermin destroying

437 51, 437 52, H01L 2170

Patent

active

052179150

ABSTRACT:
A gate array base cell which can easily be configured as high conductivity transistor device or a low conductivity transistor device comprises a moat region of first conductivity type, typically heavily doped n-type silicon or heavily doped p-type silicon, for example. A channel region of a different conductivity type separates the moat region into at least three portions. An insulating layer, such as silicon dioxide, for example, and a gate are formed above the channel region. The gate may be formed of polysilicon, for example. Modifications, variations, circuit configurations and an illustrative fabrication method are also disclosed.

REFERENCES:
patent: 4079505 (1978-03-01), Hirano et al.
patent: 4742019 (1988-05-01), Bechade
patent: 4783692 (1988-11-01), Uratani
patent: 5037771 (1991-08-01), Lipp

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