Fishing – trapping – and vermin destroying
Patent
1987-03-04
1988-11-01
Roy, Upendra
Fishing, trapping, and vermin destroying
357 91, 437 22, 437176, 437912, H01L 21265, H01L 2948
Patent
active
047820314
ABSTRACT:
In an FET, two first semiconductor regions of higher impurity concentration and smaller thickness, for source electrode and drain electrode, are formed in a second semiconductor region of lower impurity concentration and larger thickness for a gate electrode, thereby obtaining a low source resistance and small leak current.
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Gohda Kazuhide
Hagio Masahiro
Katsu Shinichi
Nambu Shutaro
Tsukada Hiroshi
Matsushita Electronics Corporation
Roy Upendra
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