Method of making field-plate isolated CMOS devices

Details Method of making field-plate isolated CMOS devices Method of making field-plate isolated CMOS devices

1985-12-31

1987-09-29

Roy, Upendra

Fishing, trapping, and vermin destroying

148DIG82, 357 42, 357 91, 437 25, 437 26, 437 34, 437 52, 437 57, H01L 21263, H01L 2978, H01L 2704

Patent

active

046960929

ABSTRACT:
A dynamic read/write memory or the like is made by a twin-well CMOS process that employs field-plate isolation rather than thick field oxide, with no separate channel stop implant. The field plate is grounded over P well areas, and connected to the positive supply over the N wells. One-transistor memory cells are of metal-gate construction with N+ drain regions buried beneath oxide, and other transistors are constructed with silicided, implanted, source/drain regions, self-aligned to the metal gates, employing sidewall oxide spacers to provide lightly-doped drains.

REFERENCES:
patent: 4411058 (1983-10-01), Chen
patent: 4535530 (1985-08-01), Denda et al.
patent: 4570331 (1986-02-01), Eaton et al.

Affiliated with

Also associated with

Rating

Method of making field-plate isolated CMOS devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making field-plate isolated CMOS devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making field-plate isolated CMOS devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1582928