Method of making ferroelectric memory cell for VLSI RAM array

Details Method of making ferroelectric memory cell for VLSI RAM array Method of making ferroelectric memory cell for VLSI RAM array

1997-06-06

2000-04-11

Tsai, Jey

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

438240, 438253, H01G 706

Patent

active

060487380

ABSTRACT:
A method of forming a semiconductor memory device on a silicon substrate includes implanting doping impurities of a first type in the silicon substrate to form a conductive channel of a first type for use as a gate junction region, forming a MOS capacitor on the conductive channel of the first type, depositing an FEM capacitor over the MOS capacitor, thereby forming a stacked gate unit, implanting doping impurities of a second type in the silicon substrate on either side of the gate junction region to form a conductive channel of a second type for use as a source junction region and a drain junction region, and depositing an insulating structure about the FEM gate unit. A ferroelectric memory (FEM) cell constructed according to the invention includes a silicon substrate, a gate region located in said substrate, a source junction region and a drain junction region located on either side of said gate region, a MOS capacitor, a FEM capacitor, wherein said FEM capacitor is stacked on and overlays at least a portion of said MOS capacitor, thereby forming, with said MOS capacitor, a stacked gate unit.

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