Method of making enhanced insulated gate bipolar transistor

Details Method of making enhanced insulated gate bipolar transistor Method of making enhanced insulated gate bipolar transistor

1991-06-17

1992-08-25

Thomas, Tom

Fishing, trapping, and vermin destroying

437 26, 437 29, 437 40, 437 50, 437228, 148DIG126, H01L 21265, H01L 21328

Patent

active

051418894

ABSTRACT:
An insulated gate bipolar device is formed on a multiple conductivity substrate. The multiple conductivity substrate comprises interspersed regions of N+ and P+ semiconductor material. In a preferred embodiment, the N+ and P+ regions are arranged in a checkerboard, mosaic pattern on a bottom side of the substrate. The P+ region serves to conductivity modulate an N epitaxial layer in which the IGBT structure is formed while the N+ regions improve low current conductivity, reduce minority carrier recombination time, and make an integral drain source diode accessible from the drain and source electrodes.

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Akiyama et al., "A Collector Shorted Type Insulated Gate Bipolar Transistor", PCIM'88 Proc., pp. 142-151, 1988.
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Akeyama et al., "Novel Low-Loss and High Speed Diode Utilizing an Ideal Ohmic Contact", IEEE Trans. on Electron Devices, ED-29, No. 2, Feb. 1982.
Sin, J. et al.; "Conductivity Modulation Effect in High Voltage N-Channel Schottky Injection FETs", Electrochemical Society Proceedings of the Symposium on High Voltage and Smart Power IC's; vol. 89-15, 1989.

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