Method of making DRAM having a side wall doped trench and stacke

Details Method of making DRAM having a side wall doped trench and stacke Method of making DRAM having a side wall doped trench and stacke

1991-02-20

1991-12-24

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 38, 437 47, 437 48, 437 60, 437193, 437162, 437233, 437919, H01L 2170

Patent

active

050752480

ABSTRACT:
A DRAM cell having a SDTAS structure having a trench stacked capacitor which includes a capacitor charge storage electrode which is in physical contact and is electrically connected to a N+ drain region, and a VCC/2 electrode which is electrically isolated by an ONO layer formed between the capacitor charge storage electrode and the VCC/2 electrode is disclosed. Such cell can increase the capacitance of the capacitor and reduce the area of the cell by reducing the width of the MOSFET, and a method for manufacturing such cell.

REFERENCES:
patent: 4366613 (1983-01-01), Ogura et al.
patent: 4433468 (1984-02-01), Kawamata
patent: 4688063 (1987-08-01), Lu et al.
patent: 4728623 (1988-03-01), Lu et al.
patent: 4786954 (1988-11-01), Morie et al.
patent: 4801988 (1989-01-01), Kenney
patent: 4873205 (1989-10-01), Critchlow et al.
patent: 4894696 (1990-01-01), Takeda et al.
patent: 4922313 (1990-05-01), Tsuchiya
patent: 4967248 (1990-10-01), Shimizu

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