Fishing – trapping – and vermin destroying
Patent
1989-01-09
1993-12-07
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 47, 437 60, 437228, 437919, H01L 2170, H01L 27108
Patent
active
052683214
ABSTRACT:
A semiconductor memory device comprises a p.sup.- -type semiconductor substrate (1), p.sup.+ -type regions (15, 80) formed thereon, n.sup.+ -type regions (6, 7) surrounded with the p.sup.+ -type regions (15, 80), a first gate electrode (2) formed on a charge storage region in the n.sup.+ -type region (6), and a second gate electrode (3) formed on the p.sup.+ -type region (80) and serving as a word line. The p.sup.+ -type regions (15, 80) prevent passage of electrons out of electron-hole pairs induced by alpha rays so as to prevent occurrence of soft errors. An oxide film (16) is formed on the side wall of the second gate electrode (3), a titanium silicide film (17) is formed on the n.sup.+ -type regions (6, 7) and a titanium silicide film (18) is formed on the second gate electrode (3) in a self-aligning manner. Therefore, increase of interconnection resistance of the second gate electrode (3 ) and diffusion resistance of the n.sup.+ -type regions (6, 7) is prevented. A bit line is formed on the semiconductor region and connected thereto. An inner layer insulation film is optionally connected thereto. An inner layer insulation film is optionally formed between the bit line and the refractory metal silicide film placed on the semiconductor n.sup.+ -type region. The interlayer insulation film preferably comprises a silicon oxide film or a phosphorus oxide film. Finally, a protective film is optionally formed on the bit line. The protective film is preferably made of a material having a low dielectric constant.
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Inuishi masahide
Shimano Hiroki
Shimizu Masahiro
Tsukamoto Katsuhiro
Hearn Brian E.
Mitsubishi Denki & Kabushiki Kaisha
Thomas T.
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