Method of making devices having thin dielectric layers

Details Method of making devices having thin dielectric layers Method of making devices having thin dielectric layers

1986-02-25

1989-03-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 48, 437 52, 437 40, 437 43, 437193, 437233, 437919, H01L 2170

Patent

active

048142913

ABSTRACT:
Certain devices require a high quality thin (<25 nanometer) dielectric layer formed on a deposited silicon layer. Applications include capacitor dielectrics in dynamic memories and linear devices. In another application, an electrically erasable programmable read only memory (EEPROM) uses an SiO.sub.2 layer between the write gate and the floating gate. The present technique oxidizes amorphous silicon under conditions that suppress grain growth to produce a higher quality oxide than that achieved with conventional furnace oxidation of polysilicon. Rapid thermal oxidation is one method of practicing the technique.

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