Fishing – trapping – and vermin destroying
Patent
1995-10-17
1997-07-22
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
437 50, 437203, H01L 21339
Patent
active
056503520
ABSTRACT:
A CCD shift register includes a second gate electrode disposed adjacent to and longitudinally spaced from a first gate electrode, and a buried layer having a first dopant impurity concentration. The first gate electrode is disposed over the buried layer to define a first buried layer area. The second gate electrode is disposed over the buried layer to define a second buried layer area greater than the first buried layer area. In the buried layer, a trench region is formed to have a second dopant impurity concentration greater than the first dopant impurity concentration. The first gate electrode is disposed over the trench region to define a first trench area. The second gate electrode being disposed over the trench region to define a second trench area less than the first trench area. The first and second trench areas are dimensioned so that a first charge storage capacity is equal to or greater than a second charge storage capacity. A tapped CCD shift register includes a first CCD shift register segment and a second shift register segment, both the first and second CCD shift register segments being characterized by a pitch length in the longitudinal direction. The first CCD shift register segment includes a sense node, and the second CCD shift register segment includes a beginning shift register charge storage element, both the sense node and the beginning shift register charge storage element being disposed within one pitch length in the longitudinal direction.
REFERENCES:
patent: 4087832 (1978-05-01), Jambotkar
patent: 4210922 (1980-07-01), Shannon
patent: 4246591 (1981-01-01), Kosonocky et al.
patent: 4658278 (1987-04-01), Elabd et al.
patent: 4665420 (1987-05-01), Kosonocky et al.
patent: 4667213 (1987-05-01), Kosonocky
patent: 4698656 (1987-10-01), Kamata
patent: 4809048 (1989-02-01), Kimata et al.
patent: 4812887 (1989-03-01), Boudewijns
patent: 4866497 (1989-09-01), Kosonocky
patent: 4888633 (1989-12-01), Terui
patent: 4901125 (1990-02-01), Yamada
patent: 4965648 (1990-10-01), Yang et al.
patent: 4992841 (1991-02-01), Halvis
patent: 5065203 (1991-11-01), Yang et al.
patent: 5077592 (1991-12-01), Janesick
patent: 5155597 (1992-10-01), Lareau et al.
patent: 5233429 (1993-08-01), Jung
patent: 5252509 (1993-10-01), Hosack
patent: 5289022 (1994-02-01), Iizuka et al.
patent: 5323034 (1994-06-01), Furumiya
patent: 5369039 (1994-11-01), Hynecek
patent: 5500383 (1996-03-01), Hynecek
Chen and Tseng, "A High Speed Tapped CCD Photodiode Linear Image Sensor", IEEE Electron Device Letters, vol. EDL-2, No. 10, Oct. 1981.
Farrier Michael George
Kamasz Stacy Royce
Chaudhari Chandra
Dalsa Inc.
LandOfFree
Method of making CCD readout register having multiple outputs does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of making CCD readout register having multiple outputs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making CCD readout register having multiple outputs will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1559729