Method of making carrier conduction conductor-insulator semicond

Details Method of making carrier conduction conductor-insulator semicond Method of making carrier conduction conductor-insulator semicond

1994-07-26

1995-03-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 67, 437131, H01L 21265

Patent

active

053995120

ABSTRACT:
A Conductor Insulator Semiconductor (CIS) heterojunction transistor. The CIS transistor is on silicon (Si) substrate. A layer of n type Si is deposited on the substrate. A trench is formed through the n type Si layer, and may extend slightly into the substrate. The trench is filled with an insulator, preferably SiO.sub.2. A layer of p type Si.sub.1-z Ge.sub.z (where z is the mole fraction of Ge and 0.1.ltoreq.z.ltoreq.0.9) is deposited on the n type Si layer. A p.sup.+ base contact region is defined in the p type Si.sub.1-z Ge.sub.z region above the oxide filled trench. A n type dopant is ion implanted into both the Si.sub.1-z Ge.sub.z and n Si layers and may extend slightly into the substrate, forming a collector region. A thin oxide layer is deposited on the Si.sub.1-z Ge.sub.z layer and a low work function metal such as Al, Mg, Mn, or Ti is selectively deposited on the thin oxide and to define an emitter. Alternatively, the emitter may be p.sup.+ polysilicon. Next, the thin oxide is opened to define collector and base contacts. A suitable metal, such as Al is deposited in the base and collector contacts.

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