Method of making bipolar transistor with reduced topography

Details Method of making bipolar transistor with reduced topography Method of making bipolar transistor with reduced topography

1992-04-30

1993-08-10

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 31, 257515, 257518, H01L 21265, H01L 2970

Patent

active

052348466

ABSTRACT:
A vertical bipolar transistor is constructed with reduced step height by codeposition of a polysilicon base contact member and an epitaxial device layer, thereby placing the base contact below the device surface, and by the use of a doped glass layer as a dopant source for the base contact and as a dopant source to provide a continuous conductive path to the base, and as the dielectric separating the base contact from the emitter contact, and as an etch stop when forming the base implantation aperture.

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