Method of making bipolar transistor with integrated base...

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of...

Reexamination Certificate

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C438S329000, C438S331000, C438S336000, C438S377000, C257S583000, C257S584000, C257S587000, C257S588000

Reexamination Certificate

active

06890826

ABSTRACT:
A method of manufacturing a bipolar junction transistor results in an integrated polysilicon base contact and field plate element minimally spaced from a polysilicon emitter contact by using a single mask to define respective openings for these elements. In particular, a dielectric layer is deposited on a semiconductor wafer and has two openings defined by a single masking step, one opening above an emitter region and a second opening above a base-collector junction region. Polysilicon is deposited on the dielectric layer and selectively doped in the areas of the openings. Thus for an NPN transistor for example, the area above the emitter opening is doped N type and the area above the base/field plate opening is doped P type. The doped polysilicon is patterned and etched to leave a polysilicon emitter contact and an integrated polysilicon base contact and field plate within the respective openings. Metal contacts are then deposited on the polysilicon emitter contact and integrated base contact and field plate.

REFERENCES:
patent: 5939738 (1999-08-01), Morris
Maida, Mike, “High-Speed Amplifiers Utilize New Complementary Bipolar Process,” http://www.nikkeibp.asiabiztech.com
ea/200112/inst_157740.html, (Dec. 2001).

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