Fishing – trapping – and vermin destroying
Patent
1994-10-25
1996-05-14
Chaudhari, Chandra
Fishing, trapping, and vermin destroying
148DIG9, 148DIG124, H01L 218249
Patent
active
055167187
ABSTRACT:
The invention concerns a BI-CMOS process, in which Field-Effect Transistors (FETs) and Bipolar Junction Transistors (BJTs) are manufactured on a common substrate. In several processing steps, FET structures are formed simultaneously with BJT structures. For example, in one step, polysilicon gate electrodes for the FETs and polysilicon emitters for the BJTs are formed simultaneously. In another aspect of the invention, a polysilicon layer is used to reduce channeling which would otherwise occur during an implant step.
REFERENCES:
patent: 4800171 (1989-01-01), Iranmanesh et al.
patent: 4818720 (1989-04-01), Iwasaki
patent: 4868135 (1989-09-01), Ogura et al.
patent: 4897703 (1990-01-01), Spratt et al.
patent: 4929570 (1990-05-01), Howell
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 4965216 (1990-10-01), Scovell et al.
patent: 5001081 (1991-03-01), Tuntasood et al.
patent: 5006476 (1991-04-01), De Jong et al.
patent: 5047357 (1991-09-01), Eklund
Wolf, S., "Silicon Processing for the VLSI Era", vol. 2, p. 65, 1990.
Solid-State Technology--BiCMOS Processing, pp. 71-76, Jun. 1992 Havemann & Eklund--Texas Instruments, Inc.
"Process Integration Issues For Submicron BiCMOS Technology" Solid-State Technology--BiCMOS Processing, pp. 31-34, Aug. 1992 Lage.
"BiCMOS Memories: Increasing Speed While Minimizing Process Complexity" IEEE Journal of Solid-State Circuits, vol. 23, No. 1, pp. 5-11, Feb. 1988, Kubo, et al.
"Perspective on BiCMOS VLSI's".
IEEE Transactions On Electron Devices vol. ED-34 No. 6, pp. 1304-1310 Ikeda, et al., Jun. 1987.
Odaka, Ogiue "High-Speed BiCMOS Technology With A Buried Twin Well Structure".
AT&T Global Information Solutions Company
Bailey Wayne P.
Chaudhari Chandra
Foote Douglas
Hyundai Electronics America
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