Method of making asymmetrical transistor with lightly doped drai

Details Method of making asymmetrical transistor with lightly doped drai Method of making asymmetrical transistor with lightly doped drai

1996-09-03

1997-07-15

Niebling, John

Fishing, trapping, and vermin destroying

437 41, H01L 21265

Patent

active

056482868

ABSTRACT:
An asymmetrical IGFET including a lightly doped drain region, heavily doped source and drain regions, and an ultra-heavily doped source region is disclosed. Preferably, the lightly doped drain region and heavily doped source region provide channel junctions. A method of making the IGFET includes providing a semiconductor substrate, forming a gate with first and second opposing sidewalls over the substrate, applying a first ion implantation to implant lightly doped source and drain regions into the substrate, applying a second ion implantation to convert the lightly doped source region into a heavily doped source region without doping the lightly doped drain region, forming first and second spacers adjacent to the first and second sidewalls, respectively, and applying a third ion implantation to convert a portion of the heavily doped source region outside the first spacer into an ultra-heavily doped source region without doping a portion of the heavily doped source region beneath the first spacer, and to convert a portion of the lightly doped drain region outside the second spacer into a heavily doped drain region without doping a portion of the lightly doped drain region beneath the second spacer. Advantageously, the IGFET has low source-drain series resistance and reduces hot carrier effects.

REFERENCES:
patent: 5286664 (1994-02-01), Horiuchi
patent: 5424229 (1995-06-01), Oyamatsu
patent: 5547885 (1996-08-01), Ogoh
patent: 5578509 (1996-11-01), Fujita

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