Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state
Patent
1995-12-29
1998-07-21
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to conductive state
438467, 438600, H01L 2182
Patent
active
057834679
ABSTRACT:
An antifuse structure includes a first electrode, a layer of enhanced amorphous silicon over the first electrode, and a second electrode over the layer of enhanced amorphous silicon. The layer of enhanced amorphous silicon is formed by an ion-implantation of a neutral species and a dopant species into a deposited layer of amorphous silicon, such that the antifuse structure will have a stable conductive link in a programmed state and such that it will be less susceptible to off-state leakage in an unprogrammed state. A method for making an antifuse structure includes forming a lower electrode, depositing an amorphous silicon layer over the lower electrode, ion-implanting a neutral species and a dopant species into the amorphous silicon layer, and forming an upper electrode over the amorphous silicon layer.
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Han Yu-Pin
Loh Ying-Tsong
Sanchez Ivan
Bowers Jr. Charles L.
Gurley Lynne A.
VLSI Technology Inc.
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