Method of making analog multiplexer cell for mixed digital and a

Details Method of making analog multiplexer cell for mixed digital and a Method of making analog multiplexer cell for mixed digital and a

1995-05-18

1997-06-17

Bowers, Jr., Charles L.

Fishing, trapping, and vermin destroying

437 56, 327404, H01L 218238

Patent

active

056396805

ABSTRACT:
An input cell circuit for an integrated circuit for use in a mixed signal mode where an input pin may receive either digital or analog signals. The circuit solves the problem where several such pins are used in a mixed signal mode and share a common internal bus. Such input signals will cause erratic values on the common analog bus, if any given input pin is used as a digital input signal and the voltage on that input pin exceeds the supply voltage by the base-emitter voltage of the parasitic transistor in the P-channel transistor in a pass gate in the associated input cell. This problem is solved by adding a second P-channel transistor to the pass gate and also adding an N-channel transistor connected to a node between the two P-channel transistors, as well as adding an input resistor. The second N-channel transistor is on while the other three transistors are off and exhibits a drain/source on-resistance such that the lateral and vertical bipolar parasitic transistors formed by the second P-channel transistor will not turn on and there is no leakage current between the input of the cell and the output of the cell.

REFERENCES:
patent: 4985703 (1991-01-01), Kaneyama
patent: 4998101 (1991-03-01), Trumpp et al.
patent: 5276346 (1994-01-01), Iwai et al.
S. Wolf, "Silicon Processing for the VLSI Era" vol. II, pp. 376-383, 387-389, 416-419 Jun. 1990.

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