Method of making an integrated circuit including structuring...

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

Reexamination Certificate

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C257S532000, C430S296000

Reexamination Certificate

active

07888230

ABSTRACT:
A method of making an integrated circuit including structuring a material. The method includes providing an arrangement of three-dimensional bodies. The material is arranged between the bodies and structured directed radiation. The projection pattern of the three-dimensional bodies is transferred into the material. The structured material connects at least two of the three-dimensional bodies.

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patent: 2006/0263968 (2006-11-01), Manning
patent: 2007/0037349 (2007-02-01), Gutsche et al.
Kim et al., “A Mechanically Enhanced Storage node for virtually unlimited Height (MESH) Capacitor Aiming at sub 70nm DRAMs”, IEDM Tech. Dig., p. 69-72 (2004).

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