Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2011-04-26
2011-04-26
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S126000, C716S130000, C716S131000
Reexamination Certificate
active
07934189
ABSTRACT:
A method for simplifying metal shapes in an integrated circuit including receiving an incoming wire layout for at least one metal layer of an integrated circuit, the incoming wire layout for the at least one layer including a plurality of wires running in a preferred direction and a plurality of vias connected thereto. The method further includes segmenting each of the wires into a plurality of bricks according to a set of equally spaced parallel grid lines extending in direction which is perpendicular to the preferred direction such that each wire comprises a series of consecutive bricks with brick boundaries between consecutive bricks occurring at a grid line, defining each brick as a regular or complex brick based on at least one brick criteria, and defining brick groups based on one or more grouping criteria, wherein each group contains one or more consecutive bricks of a same wire and each brick belongs to only one group so that each wire comprises a series of one or more consecutive groups, and wherein groups containing at least one complex brick are defined as complex groups.
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Herry Jacques
Melzner Hanno
Rizzo Olivier
Dicke Billig & Czaja, PLLC
Infineon - Technologies AG
Siek Vuthe
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