Method of making an integrated circuit, including forming a...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S620000, C438S720000

Reexamination Certificate

active

07348279

ABSTRACT:
In order to form a contact in a layer on a substrate, in particular a contact in a logic circuit in a semiconductor component, the mask layer is structured for etching of the contact holes with a photoresist layer which is exposed using two masks, with the first mask containing a regular pattern of contact structures with a period which corresponds to the order of magnitude of twice the edge length of the contact hole, and with the second mask containing a pattern with a structure which surrounds at least the contact hole area, and thus covers it.

REFERENCES:
patent: 4837176 (1989-06-01), Zdebel et al.
patent: 6326300 (2001-12-01), Liu et al.
patent: 101 64 306 (2003-07-01), None
patent: 103 41 321 (2005-04-01), None
Jun. 23, 2005 German Examination Report.

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