Method of making an integrated circuit composed of group III-V c

Fishing – trapping – and vermin destroying

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437 59, 437 56, 437133, 148DIG9, 148DIG72, H01L 21265, H01L 2170

Patent

active

052234495

ABSTRACT:
Integrated circuits and fabrication methods incorporating both NPN (192, 194, 210) and PNP (196, 121, 124) heterojunction bipolar transistors together with N channel (198, 200, 216, 218) and P channel (202, 204, 220, 222) JFETs on a single substrate as illustrated in FIG. 10. MESFETs may be also be integrated on the substrate.

REFERENCES:
patent: 4981807 (1991-01-01), Tambotkar
patent: 5015594 (1991-05-01), Chu et al.

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