Method of making an EPROM memory cell

Fishing – trapping – and vermin destroying

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437 40, 437 44, 437 48, 437 50, 437 49, 437 51, 437 52, 437 61, 437 69, 437191, 437195, 437228, H01L 21225, H01L 2126

Patent

active

048493694

ABSTRACT:
An a MIS integrated circuit, such as an EPROM memory cell integrated onto a semiconductor substrate comprises (a) memory points which are insulated from one another and have in each case a stack of materials formed from a first insulant in contact with the substrate, first and second gates separated from one another by a second insulant, the first gate being in contact with the first insulant, a source and a drain formed in the substrate on either side of the stack of gates, and a channel, whose length is oriented according to a first direction Y, (b) first metal lines parallel to the first direction for applying electric signals to said stacks and (c) second conductor lines parallel to a second direction X perpendicular to the first direction and produced on the drains for applying electric signals to said drains. A process for making the circuit is also disclosed.

REFERENCES:
patent: 3893152 (1975-07-01), Lin
patent: 4151021 (1979-04-01), McElroy
patent: 4258466 (1981-03-01), Kuo et al.

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