Method of making an electronic package assembly with protective

Metal working – Method of mechanical manufacture – Electrical device making

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29841, 22818021, 228214, 361783, 257684, H05K 334

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active

054149282

ABSTRACT:
An electronic package assembly wherein a low profile package is soldered to an organic (e.g., epoxy resin) substrate (e.g., printed circuit board), the projecting conductive leads of the package and the solder which substantially covers these leads (and respective conductors on the substrate) having been substantially covered with encapsulant material (e.g., polymer resin) to provide reinforcement for the solder-lead connections. The encapsulant material is dispensed about the solder and lead joints following solder reflow and solidification so as to substantially surround the solder and any portions of the leads not covered with solder. The invention has particular useful with thin, small outline package (TSOP) structures which occupy a minimum of height on the substrate surface.

REFERENCES:
patent: 4238528 (1980-12-01), Angelo et al.
patent: 4311267 (1982-01-01), Lim
patent: 4604644 (1986-08-01), Beckham et al.
patent: 4644445 (1987-02-01), Sakuma
patent: 4825284 (1989-04-01), Soga et al.
patent: 4830922 (1989-05-01), Sparrowhawk et al.
patent: 4999699 (1991-03-01), Christie et al.
IBM Tech. Discl. Bulletin, "Encapsulated Solder Joint for Chip Mounting" vol. 32, No. 10B, p. 480 Mar. 1990.
IBM Technical Disclosure Bulletin vol. 33, No. 10B, Mar. 1991, pp. 205-207, "Encapsulation Schemes For C4-Bonded Tab Packages", by Ameen et al.
"The Effects Of Thermal Cycle Stress On Potted SMT Circuit Card Assemblies", by R. M. Berg (date and journal unknown).

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