Method of making an electrically-erasable, electrically-programm

Details Method of making an electrically-erasable, electrically-programm Method of making an electrically-erasable, electrically-programm

1991-04-15

1992-10-13

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 49, 437979, 437984, H01L 2176

Patent

active

051550555

ABSTRACT:
An electrically-erasable, electrically-programmable ROM or an EEPROM is constructed using an enhancement transistor merged with a floating-gate transistor, where the floating-gate transistor has a small self-aligned tunnel window positioned on the opposite side of the source from the channel and drain, in a contact-free cell layout, enhancing the ease of manufacture and reducing cell size. In this cell, the bitlines and source/drain regions are buried beneath relatively thick silicon oxide, which allows a favorable ratio of control gate to floating gate capacitance. Programming and erasing are provided by the tunnel window area on the outside of the source (spaced from the channel). The tunnel window has a thinner dielectric than the remainder of the floating gate to allow Fowler-Nordheim tunneling.

REFERENCES:
patent: 4258466 (1981-03-01), Kuo et al.
patent: 4622737 (1986-11-01), Ravaglia
patent: 4686558 (1987-08-01), Adam
patent: 4924437 (1990-05-01), Paterson et al.

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