Method of making an electrical circuit board

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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Details

C029S830000, C029S846000, C029S851000

Reexamination Certificate

active

06412168

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an electrical circuit board and more particularly, to a multi-layer electrical circuit board having multiple circuit interconnections and having apertures and/or cavities that are formed within the circuit board and/or through various portions of the circuit board.
BACKGROUND OF THE INVENTION
Multi-layer circuit boards contain and/or include electrical components and interconnecting conductive traces or routing lines which selectively and operatively populate opposed first and second surfaces (i.e., top and bottom surfaces) of each board (or other respective interior portions of each of the boards), thereby desirably allowing each of the electrical circuit boards to contain and/or include a relatively large amount of electrical components and conductive traces which efficiently and densely populate the respective boards.
It is desirable to allow for communication by and between and/or interconnection of the component and trace containing surfaces and/or portions of an electrical circuit board, thereby allowing the contained electrical components and races on each side of the board (or within certain interior portions of the board) to cooperatively and selectively interconnect to form one or more desired electrical circuits. This communication and interconnection may require the use of shared electrical ground planes, the transmittal of electrical power and/or control type signals between each of the component containing surfaces and/or the component containing board portions, and/or the selective and physical connection of various contained components.
This desired interconnection typically requires one or more holes or cavities to be drilled and/or formed through the core of the circuit board substrate, thereby selectively creating one or more “through-hole” type vias (i.e., holes which “pass through” and/or traverse the entire circuit board or all of the opposed component containing surfaces), and one or more “blind” type vias (i.e., holes which do not “pass through” and/or traverse the entire circuit board and all of the opposed component containing surfaces). The vias are then typically filled with solder (e.g., a pin or component connector is soldered into the hole) or another conductive material. In this manner, electrical connections are made or formed which connect electrical components and/or circuitry to the core of the circuit board substrate, or to other components and/or circuitry located on the opposing side or surface of the board.
One drawback with these conventional vias when applied to this type of circuit board design is that layers of relatively non-solderable material (i.e., material which does not substantially bind or metallurgically bond with solder) are typically present within these vias, and thus, the solder does not consistently and reliably electrically connect the desired layers of circuitry and/or components together. For example and without limitation, many conventional vias include an annular portion or ring which is disposed around the via opening and is designed to hold or retain solder within the via. These annular ring type vias require an adhesive film or material to be applied underneath the ring in order to bond the ring to the circuit board core layer. This adhesive film or material is adjacent to the via and often softens and flows into the via when the circuit board substrate is laminated, thereby causing soldering defects in the subsequent circuit board construction processes. The annular ring type portions also create unfavorable surface tension when solder is inserted into the via, thereby often preventing the solder from “wetting” or metallurgically bonding to the core or bottom layer of the circuit board. In these types of situations, the solder “wets” or metallurgical bonds only to the annular ring portion, thereby creating a dome of solder that covers the via and results in a defective portion or region of the circuit board where all layers of the circuit board are not desirably interconnected. Other attempts at forming more reliable connections through vias, include plated through hole type vias. However, these types of vias are relatively difficult and expensive to produce.
There is therefore a need to overcome some or all of the previously delineated drawbacks of prior circuit board designs including improved vias or cavities for selectively interconnecting one or more layers of electrical circuitry.
SUMMARY OF THE INVENTION
It is a first object of the present invention to provide a method for producing a multi-layer electrical circuit board that overcomes some or all of the previously delineated drawbacks of prior multi-layer electrical circuit board forming methodologies and techniques.
It is a second object of the present invention to create a via, aperture or cavity which provides a highly reliable and solderable interconnection by eliminating the flow effects of adhesive materials and non-wettable substrate aperture sidewall surfaces.
It is third object of the invention to provide a method for producing a multi-layer electrical circuit board which overcomes some or all of the previously delineated drawbacks of prior multi-layer electrical circuit board forming methodologies and techniques and which allows for the selective, efficient, and reliable formation of apertures or cavities which provide for communication by and between some or all of the various component containing surfaces and portions of the formed multi-layer electrical circuit board, which selectively allows components contained within and/or upon these portions and surfaces to be interconnected, and which is further adapted to selectively and communicatively receive an electrical component and/or an electrical component connector portion.
According to a first aspect of the present invention a method for making a multi-layer electrical circuit board is provided. The method includes the steps of providing a conductive core member having a first surface; providing an insulating layer; selectively coupling the insulating layer to the first surface; attaching a conductive layer to the first insulating layer; selectively removing a portion of the insulating layer from a first region of the multi-layer circuit board; and selectively removing a portion of the conductive layer from the first region, the portion of said conductive layer cooperating with the portion of the insulating layer to form a blind via within the multi-layer circuit board which extends to the conductive core member, and being further effective to form a protrusion of the conductive layer which extends over the blind via.
According to a second aspect of the present invention a circuit board assembly is provided. The circuit board assembly includes an electrically conductive core layer having a first surface; a dielectric material coupled to the first surface of the core layer; a blind via which is formed within said dielectric material and the adhesive material and which extends to the electrically conductive core layer; and an electrically conductive member which is coupled to the adhesive material and which includes a first portion which extends over the blind via, and which is effective to draw in solder material which is selectively inserted into the blind via, thereby forming a reliable connection between the electrically conductive member the said electrically conductive core layer.
These and other objects, aspects, and advantages of the present invention will become apparent upon reading the following detailed description in combination with the accompanying drawings.


REFERENCES:
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patent: 4893404 (1990-01-01), Shirahata et al.
patent: 4916809 (1990-04-01), Boudou et al.
patent: 5401911 (1995-03-01), Anderson et al.
patent: 5738797 (1998-04-01), Belke, Jr. et al.
patent: 5915757 (1999-06-01), Tsuyama et al.
patent: 5956843 (1999-09-01), Mizumoto et al.
patent: 6188028 (2001-02-01), Haba et al.

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