Method of making an EEPROM with improved capacitive coupling bet

Details Method of making an EEPROM with improved capacitive coupling bet Method of making an EEPROM with improved capacitive coupling bet

1990-08-06

1991-10-15

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 49, 437195, H01L 21265

Patent

active

050574469

ABSTRACT:
According to the invention, an integrated circuit with improved capacitive coupling is provided, and includes a first conductor (20), a second conductor (16), and a third conductor (22). The second conductor (22) and third conductor (16) are disposed adjacent each other, separated by an insulator region (60). The first conductor (20) contacts the third conductor (16) and extends across a portion of the third conductor (22). The first and third conductors are separated by an insulator region (54). A voltage applied to first conductor (20) and second conductor (16) is capacitively coupled to third conductor (22).

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