Fishing – trapping – and vermin destroying
Patent
1995-01-20
1997-03-25
Thomas, Tom
Fishing, trapping, and vermin destroying
437 41, H01L 21265
Patent
active
056144270
ABSTRACT:
A thin film transistor (TFT) array in an active matrix liquid crystal display (AMLCD) including a centrally located round source electrode completely surrounded by a substantially annular or circular shaped drain electrode. The geometric design of the TFT of this invention provides for a thin film transistor having a reduced parasitic capacitance and decreased photosensitivity. The TFTs of this invention are located at the intersections of gate and drain lines of an active matrix LCD array thereby increasing the size of the pixel display openings of the matrix array.
REFERENCES:
patent: 3405330 (1968-10-01), Hilbiber
patent: 3413531 (1968-11-01), Leith
patent: 3454844 (1969-07-01), Dill
patent: 3492548 (1970-01-01), Goodman
patent: 3675091 (1972-07-01), Naomoto et al.
patent: 3787962 (1974-01-01), Yoshida et al.
patent: 3862360 (1975-01-01), Dill et al.
patent: 4112333 (1978-09-01), Asars et al.
patent: 4159561 (1979-07-01), Dingwall
patent: 4288806 (1981-09-01), Ronen
patent: 4333225 (1982-06-01), Yeh
patent: 4537654 (1985-08-01), Berenz et al.
patent: 4654117 (1987-03-01), Aoki et al.
patent: 4686553 (1987-08-01), Possin
patent: 4689116 (1987-08-01), Coissard et al.
patent: 4689872 (1987-09-01), Appels et al.
patent: 4697331 (1987-10-01), Boulitrop et al.
patent: 4717689 (1988-01-01), Maas et al.
patent: 4738936 (1988-04-01), Rice
patent: 4762398 (1988-08-01), Yasui et al.
patent: 4797108 (1989-01-01), Crowther
patent: 4798810 (1989-01-01), Blanchard et al.
patent: 4843443 (1989-06-01), Ovshinsky et al.
patent: 4853345 (1989-08-01), Himelick
patent: 4855806 (1989-08-01), Parks et al.
patent: 4859623 (1989-08-01), Busta
patent: 4862234 (1989-08-01), Koden
patent: 4877749 (1989-10-01), Quigg
patent: 4879254 (1989-11-01), Tsuzuki et al.
patent: 4904613 (1990-02-01), Coe et al.
patent: 4914051 (1990-04-01), Huie et al.
patent: 4914058 (1990-04-01), Blanchard
patent: 4949141 (1990-08-01), Busta
patent: 5003356 (1991-03-01), Wakai et al.
patent: 5047819 (1991-09-01), Tanaka et al.
patent: 5051800 (1991-09-01), Shoji et al.
patent: 5055899 (1991-10-01), Wakai et al.
patent: 5058995 (1991-10-01), Plus
patent: 5070379 (1991-12-01), Nomoto et al.
patent: 5073519 (1991-12-01), Rodder
patent: 5306656 (1994-04-01), Williams et al.
Boer Willem den
Yang Mohshi
Gurley Lynne A.
OIS Optical Imaging Systems, Inc.
Thomas Tom
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