Method of making a transistor having easily controllable impurit

Details Method of making a transistor having easily controllable impurit Method of making a transistor having easily controllable impurit

1994-05-13

1996-08-13

Fourson, George

Fishing, trapping, and vermin destroying

437 40, 437913, 437180, H01L 2120

Patent

active

055455867

ABSTRACT:
On the substrate of an integrated circuit chip is deposited a first insulating layer in which a low resistivity semiconductor region is subsequently formed. An insulating film is formed on a side wall of the low resistivity semiconductor region. A slit is formed in the first insulating layer so that a portion of the substrate and a portion of the insulating film are exposed. First, second and third semiconductor layers of different conductivity types are epitaxially grown in the slit so that the second layer is in contact with the exposed insulating film. A second insulating layer is deposited on the chip. Through the second insulating layer first, second and third electrodes are brought into contact with the first and third semiconductor layers and with the low resistivity semiconductor region. Due to the stacking of epitaxial layers of different conductivity types, the impurity profiles of the epitaxial layers can be precisely controlled.

REFERENCES:
patent: 4334235 (1982-06-01), Nishizawa
patent: 4663831 (1987-05-01), Birittella et al.
patent: 4757029 (1988-07-01), Koury, Jr.
patent: 4764801 (1988-08-01), McLaughlin et al.
patent: 4786615 (1988-11-01), Liaw et al.
patent: 4860077 (1989-08-01), Reuss et al.
patent: 4902641 (1990-02-01), Koury, Jr.
patent: 4994999 (1991-02-01), Nishizawa
patent: 5208172 (1993-05-01), Fitch et al.
patent: 5308778 (1994-05-01), Fitch et al.
patent: 5340754 (1994-08-01), Witek et al.
"A Surrounding Gate Transistor (SGT) Cell for 64/256 Mbit DRAMs", K. Sunouchi, et al., ULSI Research Center, Toshiba Corporation, IEDM, 1989, pp. 23-26.
"A Fully Depleted Lean-Channel Transistor (DELTA)", D. Hisamoto, et al. Central Research Laboratory, Hitachi, Ltd. IEDM, 1989, pp. 833-836.

Affiliated with

Also associated with

Rating

Method of making a transistor having easily controllable impurit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making a transistor having easily controllable impurit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making a transistor having easily controllable impurit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1047762