Method of making a thin conformal high-yielding multi-chip modul

Details Method of making a thin conformal high-yielding multi-chip modul Method of making a thin conformal high-yielding multi-chip modul

1996-06-24

1997-08-12

Niebling, John

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

438107, 438459, 438977, H01L 21302, H01L 21463

Patent

active

056565526

ABSTRACT:
A method of making a multi-chip module by thinning individual integrated circuit die or an integrated circuit wafer containing multiple integrated circuits; bonding thinned dice or a thinned wafer to a mylar, polyimide, semiconductor, or ceramic substrate; depositing at least one interconnect material over the wafer, where the first interconnect layer is deposited directly over the wafer; depositing a dielectric layer over each of the interconnect layers; opening vias in the dielectric layers in order to interconnect the dice and multi-chip module as required; and removing the substrate to form a thin, conformal, and high-yielding multi-chip module.

REFERENCES:
patent: 5075253 (1991-12-01), Sliwa, Jr.
patent: 5144747 (1992-09-01), Eichelberger
patent: 5324687 (1994-06-01), Wojnarowski
patent: 5373627 (1994-12-01), Grebe
patent: 5386623 (1995-02-01), Okamoto et al.
patent: 5401688 (1995-03-01), Yamaji et al.
patent: 5432677 (1995-07-01), Mowatt et al.
patent: 5478781 (1995-12-01), Bertin et al.
patent: 5517754 (1996-05-01), Beilstein, Jr. et al.

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