Method of making a silicon package for a power semiconductor dev

Details Method of making a silicon package for a power semiconductor dev Method of making a silicon package for a power semiconductor dev

1991-04-08

1992-07-28

Schor, Kenneth M.

Glass manufacturing

Processes

Fusion bonding of glass to a formed part

65 36, 65 58, 437213, C03B 2320

Patent

active

051337959

ABSTRACT:
A method is provided for making a hermetically sealed package for a power semiconductor wafer having substantially entirely silicon materials selected to have coefficients of thermal expansion closely matching that of the power semiconductor wafer. A semiconductor wafer such as a power diode includes a layer of silicon material having first and second device regions on respective sides. An electrically conductive cap and base of silicon are disposed in electrical contact with the first and second regions of the semiconductor device, respectively. An electrically insulative sidewall of silicon glass material surrounds the semiconductor wafer, is spaced from an edge thereof, and is bonded to the cap and base for hermetically sealing the package. The glass sidewall is directly bonded to the base by bringing the base and sidewall into intimate contact under a slight pressure and heating to a temperature at which the glass wets the silicon base but does not soften enough to lose its form, holding this temperature for a holding time and cooling the composite the complete the bond.

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