Method of making a silicon diode array target

Details Method of making a silicon diode array target Method of making a silicon diode array target

1979-02-21

1980-11-04

Ozaki, G.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

148 15, 148188, H01L 21225

Patent

active

042318203

ABSTRACT:
A novel process is disclosed in which an insulating layer is formed on a N type semiconductor substrate and an array of apertures is formed through the insulating layer to expose the substrate. A film of substantially intrinsic polycrystalline silicon is deposited over the insulating layer and the exposed substrate surfaces. A masking layer having a plurality of interconnecting members is formed photolithographically on the film, the members defining an array of openings in substantial registration with the apertures. A P type doping element, such as boron, is diffused laterally into the intrinsic film beneath each masking member and is simultaneously diffused into the substrate to form a plurality of PN junctions. The lateral diffusion is controlled so that the undoped regions underlying each of the masking elements have a width less than the width of the masking elements. The masking layer is removed and the undoped regions are selectively etched to form an array of doped silicon pads that are separated by a relatively small spacing.

REFERENCES:
patent: 3419746 (1968-12-01), Crowell et al.
patent: 3548233 (1970-12-01), Cave et al.
patent: 3615449 (1971-10-01), Greenaway
patent: 3738880 (1973-06-01), Laker
patent: 4074304 (1978-02-01), Shiba
patent: 4124933 (1978-11-01), Nicholas

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