Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material
Patent
1995-06-01
1998-07-28
Niebling, John
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
438975, 148 332, H01L 2144
Patent
active
057862672
ABSTRACT:
Disclosed is an alignment mark for the X directional alignment of a chip area on a semiconductor wafer, for example. The alignment mark comprises recesses and projections formed on a semiconductor substrate. The recesses or projections are repeatedly arranged in the X direction. The X directional width of the recesses or projections is set smaller than the X directional width of a grain on a metal film formed on the recesses and projections or the average particle size, as viewed from above the semiconductor substrate. The projections may be formed by an insulating layer formed on the semiconductor substrate.
REFERENCES:
patent: 4123661 (1978-10-01), Wolf et al.
patent: 4327292 (1982-04-01), Wang et al.
patent: 4503334 (1985-03-01), King et al.
patent: 4566177 (1986-01-01), van der Ven et al.
patent: 4623403 (1986-11-01), Wills et al.
patent: 4640888 (1987-02-01), Itoh et al.
patent: 4791302 (1988-12-01), Nozue
patent: 5002902 (1991-03-01), Watanabe
patent: 5262361 (1993-11-01), Cho et al.
patent: 5409862 (1995-04-01), Wada et al.
European Search Report, Jan. 13, 1997.
Noboru Nomura et al., Interferometric Nanometer Alignment for a Wafer Stepper by Two Wave-Front Reconstruction onto Deformed Wafer Gratings, Japanese Journal of Applied Physics, vol. 26, No. 6, Jun. 1987, pp. 959-964.
Harry Stover and Brian J. Thompson, Selected Papers on Optical Microlithography, SPIE Milestone Series, vol. MS 55, Jan. 1, 1992.
Abe Masahiro
Haraguchi Hiroshi
Nomura Wataru
Everhart C.
Kabushiki Kaisha Toshiba
Niebling John
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