Method of making a semiconductor integrated circuit utilizing in

Details Method of making a semiconductor integrated circuit utilizing in Method of making a semiconductor integrated circuit utilizing in

1991-11-26

1993-08-17

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437231, 437978, 156643, H01L 2144

Patent

active

052368700

ABSTRACT:
A semiconductor integrated circuit providing a novel patterned multilayered wiring structure to enhance the degree of the integration of the circuit and the speed of the operation. The structure includes at least one first interlaid electric insulator film on the wall of the contact portion of a first wiring layer and its vicinity, a second interlaid electric insulator film, which reacts distinctly to the etching process utilized from the first interlaid electric insulator film, is provided on a substrate.

REFERENCES:
patent: 4353159 (1982-10-01), Hsu
patent: 4367119 (1983-01-01), Logan
patent: 4398992 (1983-08-01), Fang et al.
S. Wolf et al., Silicon Processing for the VLSI Era, vol. 1, Lattice Press, Sunset Beach, CA, 1986, pp. 265-266, 546-551, 581-582.
S. K. Ghandhi, VLSI Fabrication Principles, John Wiley & Sons, New York, 1983, pp. 422-424.

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