Method of making a semiconductor device with sidewall etch stopp

Details Method of making a semiconductor device with sidewall etch stopp Method of making a semiconductor device with sidewall etch stopp

1994-04-20

1995-10-31

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437190, H01L 2144

Patent

active

054628938

ABSTRACT:
An amorphous silicon layer is used as an etch stop and is formed on the side wall of a first wiring layer having a predetermined wiring width and formed in a predetermined shape by patterning. A silicon oxide layer is covering the first wiring layer and the amorphous silicon layer, and a through-hole is formed in the silicon oxide layer so that a portion of the first wiring layer is exposed. The width of the through-hole is equal to or larger than the wiring width of the first wiring layer. A tungsten layer is filling the through-hole, and a second wiring layer connected to the tungsten layer is formed on the silicon oxide layer.

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Wolf et al.; vol. I, Silicon Processing for the VLSI Era, Lattice Press, 1986 pp. 399-405.

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