Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Reexamination Certificate
1999-12-14
2001-09-04
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
C438S253000, C438S254000, C438S381000, C438S387000, C438S388000, C438S393000, C438S397000, C438S398000, C438S399000, C438S396000
Reexamination Certificate
active
06284618
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a structure of a semiconductor device and a method for manufacturing the same, and more particularly to a structure of a semiconductor device capable of suppressing disconnection of two conductors caused by a shift of superposition to obtain a capacitor having excellent electrical characteristics, and a method for manufacturing the same.
2. Description of the Background Art
FIG. 14
is a sectional view showing a structure of a semiconductor device according to the art described in Japanese Unexamined Patent Publication No. 81-306664. In
FIG. 14
, the reference numeral
101
denotes a semiconductor substrate, the reference numeral
102
denotes an insulation film provided on the semiconductor substrate
101
, and the reference numeral
103
denotes a contact buried in the insulation film
102
with a bottom face thereof abutting on a surface of the semiconductor substrate
101
. The contact
103
includes a first contact layer
104
bonded to an internal wall and a bottom face of a contact hole formed on the insulation film
102
, and a plug
105
provided on the first contact layer
104
and buried in the contact hole.
Furthermore, an upper wiring
107
is formed on the contact
103
through a second contact layer
106
. A protective film
108
formed of an insulating material is provided on an upper face of the upper wiring
107
. A sidewall
109
formed of an insulation film is provided on side sections of the upper wiring
107
and the protective film
108
. The second contact layer
106
is provided on lower faces of the sidewall
109
and the upper wiring
107
.
FIGS. 15
to
18
are sectional views sequentially showing a method for manufacturing the semiconductor device shown in FIG.
14
. As shown in
FIG. 15
, a contact hole is first formed on an insulation film
102
provided on a semiconductor substrate
101
. A first contact layer
104
is provided on at least an internal wall and a bottom face of the contact hole, and a conductive film acting as a plug
105
is formed. Thus, the contact hole is filled with a conductive material. Then, a whole face is subjected to etch-back to remove the plug
105
and the first contact layer
104
which are provided on the insulation film
102
. Consequently, the first contact layer
104
and the plug
105
remain only in the contact hole. Thus, a contact
103
is formed.
Thereafter, a second contact layer
106
a
, a conductive film
107
a
acting as an upper wiring
107
, and a protective film
108
a
are sequentially provided on the contact
103
and the insulation film
102
as shown in FIG.
16
.
Next, a resist pattern
110
having a width which is almost equal to a diameter of the contact
103
is formed on the protective film
108
a
provided above the contact
103
as shown in FIG.
17
. The protective film
108
a
and the conductive film
107
a
are sequentially subjected to anisotropic etching by using the resist pattern
110
as an etching mask. Consequently, a protective film
108
and the upper wiring
107
are obtained. At this time, a shift of superposition causes a shift in a region indicated at W so that a contact area of the contact
103
and the upper wiring
107
is reduced. After this processing, the resist pattern
110
is removed.
Then, a silicon oxide film is provided on exposed faces of the second contact layer
106
a
, the protective film
108
and the upper wiring
107
by a CVD method as shown in FIG.
18
. Thereafter, anisotropic etching is performed to form a sidewall
109
comprising an insulation film on side sections of the protective film
108
and the upper wiring
107
. Subsequently, the second contact layer
106
a
is subjected to etching by using the sidewall
109
and the protective film
108
as etching masks. Consequently, a second contact layer
106
remains on lower faces of the sidewall
109
and the upper wiring
107
. Thus, the semiconductor device shown in
FIG. 14
is obtained.
In the semiconductor device thus formed which is shown in
FIG. 14
, the contact
103
and the upper wiring
107
cause the shift (W) of superposition. However, the second contact layer
106
provided on the lower face of the upper wiring
107
also extends over the lower face of the sidewall
109
. Therefore, it is possible to solve a problem that the first contact layer
104
forming the contact
103
is subjected to over-etching when performing etching for patterning the upper wiring
107
.
However, a bad influence of the shift of superposition has given much more weight with finer structures of elements such as a contact, a wiring and the like. For example, in the case where the contact
103
and the upper wiring
107
cause the shift (W) of superposition and they are not superposed at all as shown in
FIG. 19
, electrical connection can be obtained only through an end of the second contact layer
106
provided between the contact
103
and the upper wiring
107
. Although disconnection is not caused, a resistance is increased because a thickness of the second contact layer
106
is small. Therefore, excellent electrical characteristics cannot be obtained.
SUMMARY OF THE INVENTION
A first aspect of the present invention is directed to a semiconductor device comprising an insulation film provided on a substrate, a contact formed of a conductive material which is provided in the insulation film and is buried in a contact hole formed from a bottom face of the insulation film to a top face thereof, a conductor pattern formed on the insulation film, and a sidewall formed of a conductive material which is provided like a frame on a side face of the conductor pattern, wherein the conductor pattern and the contact are electrically connected to each other directly or through the sidewall.
A second aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, wherein the sidewall provided like a frame on the side face of the conductor pattern is located on the contact, and a part of the sidewall is buried in the contact hole.
A third aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, wherein the conductor pattern and the sidewall form a wiring.
A fourth aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, further comprising a dielectric film provided on surfaces of the conductor pattern and the sidewall, and a cell plate provided on a surface of the dielectric film, wherein the conductor pattern and the sidewall form a storage node, and a capacitor is formed by the storage node, the dielectric film and the cell plate.
A fifth aspect of the present invention is directed to the semiconductor device according to the fourth aspect of the present invention, wherein a film thickness of the conductor pattern is smaller than a vertical dimension of the sidewall, and the conductor pattern and the sidewall form a cylindrical storage node.
A sixth aspect of the present invention is directed to the semiconductor device according to the fourth aspect of the present invention, wherein a surface of the storage node which is in contact with the dielectric film is kept rough.
A seventh aspect of the present invention is directed to the semiconductor device according to the first aspect of the present invention, wherein a distance between the two adjacent conductor patterns is equivalent to a minimum dimension, and a distance between the sidewalls provided like a frame on faces on sides where the two conductor patterns are provided opposite to each other is smaller than the minimum dimension.
An eighth aspect of the present invention is directed to a method for manufacturing a semiconductor device, comprising the steps of forming a contact hole on an insulation film provided on a substrate from a top face of the insulation film to a bottom face thereof, providing a conductive material on the insulation film and filling an inside of th
Diaz José R.
Lee Eddie
Mitsubishi Denki & Kabushiki Kaisha
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
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