Fishing – trapping – and vermin destroying
Patent
1993-03-18
1995-03-14
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437194, 437228, H01L 2144
Patent
active
053977432
ABSTRACT:
A method of making a semiconductor device capable of simplifying the overall manufacturing processes and carrying out the reliable interconnections between wires. The method includes forming a first insulator over a semiconductor substrate, forming a first conductor over the first insulator and then patterning the first conductor to form a plurality of first wires, forming a second insulator over the entire exposed surface and then removing a portion of the second insulator disposed over the surface of a selector first wire to form a contact hole, forming a second conductor over the entire exposed surface and then patterning the second conductor to form an interconnection wire over the contact hole, forming a third insulator having uniform thickness and a fourth insulator having the smoothing surface in this order, etching back the third insulator and the fourth insulator, until the surface of the interconnection wire is exposed, and forming a third conductor having an uniform thickness over the entire exposed surface and the then patterning the third conductor to form a second wire to be connected to the selected first wire through the interconnection wire.
REFERENCES:
patent: 4523372 (1985-06-01), Balda
patent: 4767724 (1988-08-01), Kim et al.
patent: 4839311 (1989-06-01), Riley et al.
patent: 4879257 (1989-11-01), Patrick
patent: 4894351 (1990-01-01), Batty
patent: 4926237 (1990-05-01), Sun et al.
patent: 5006485 (1991-04-01), Villalon
patent: 5106779 (1992-04-01), Yu
S. Wolf, Silicon Processing for the VLSI Era, vol. 2, Lattice Press, Sunset Beach, CA, 1990, pp. 189-191, 198-199, 204-206, 222-224.
Article entitled "Quarter Micron Hole Filling with SiN Sidewalls by Aluminum High Temperature Sputtering," by M. Taguchi, K. Koyama and Y. Sugano; Jun. 9-10; VMIC Conference, pp. 219-224.
Article entitled "A New Selective W-CVD Process Using Poly Si Glue Layer," by K. K. Choi, Sung B. Hwang, H. L. Park, and C. G. Ko of Hyundai Electronics Industries Co., Ltd., Jun. 9-10, 1992, VMIC Conference, pp. 286-288.
Jun Young K.
Lee Chang J.
Goldstar Electron Co. Ltd.
Hearn Brian E.
Trinh Michael
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