Fishing – trapping – and vermin destroying
Patent
1991-02-01
1992-04-28
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 69, 437154, 437913, 148DIG53, H01L 21265
Patent
active
051089378
ABSTRACT:
A method of producing an improved field effect transistor integrated circuit device in a semiconductor substrate embodying a first type dopant and having a recessed gate electrode and self-aligned source and drain regions can be made. A first masking layer is formed on the surface of said semiconductor substrate that is capable of masking the underlying silicon against oxidation. Portions of first masking layer is removed to form openings that at least define the gate electrode regions. The resultant exposed silicon area are oxidized to produce a thick sunken silicon oxide layer. The first masking layer is removed. A second opposite type dopant is introduced into the substrate on opposite sides of the sunken thick oxide layer that defines the region of the gate electrode to form source and drain regions. The sunken thick oxide layer is selectively removed, thereby forming a depression in the substrate that defines the gate region. A thin oxide layer is formed over the source and drain regions, and in the depression in the said substrate. A conductive gate electrode layer is formed on the surface of substrate. Portions of the conductive layer are selectively removed to form the gate electrode in the depression. An insulating layer is formed over the gate electrode. Electrical contacts and metallurgy lines with appropriate passivation are formed. The elements of the transistor are connected by these contacts and lines to form the integrated circuit device.
REFERENCES:
patent: 4455740 (1984-06-01), Iwai
patent: 4685196 (1987-08-01), Lee
Hsu Shun-Liang
Tsai Yu-Hsein
Hearn Brian E.
Saile George O.
Taiwan Semiconductor Manufacturing Company
Trinh Michael
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