Method of making a read only memory device

Details Method of making a read only memory device Method of making a read only memory device

1994-10-21

1997-06-03

Tsai, Jey

Semiconductor device manufacturing: process

Making device array and selectively interconnecting

Rendering selected devices operable or inoperable

438275, H01L 21265

Patent

active

056354177

ABSTRACT:
A NOR type masked ROM device including a multiplicity of FETs each having a channel region, an insulated gate structure formed on the channel region, and a pair of current electrode regions disposed on the both sides of the insulated gate structure, wherein trenches are selectively formed in those FETs which are programmed to be turned off, between the insulated gate structure and at least one of the associated current electrode regions, and regions of opposite conductivity type to that of the current electrode regions are formed under the trenches.

REFERENCES:
patent: 5214303 (1993-05-01), Aoki
patent: 5298451 (1994-03-01), Rao
patent: 5316957 (1994-05-01), Spratt et al.
patent: 5329148 (1994-07-01), Aoki
patent: 5334547 (1994-08-01), Nakamura
patent: 5395777 (1995-03-01), Yang
Wolf, Stanley, Ph.D., Silicon Processing for the VLSI ERA, "Process Integration," vol. 2, Lattice Press, 1990, pp. 28-44.

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