Etching a substrate: processes – Forming or treating electrical conductor article – Forming or treating of groove or through hole
Reexamination Certificate
2000-03-31
2002-07-30
Gulakowski, Randy (Department: 1746)
Etching a substrate: processes
Forming or treating electrical conductor article
Forming or treating of groove or through hole
C216S020000, C216S039000, C216S052000, C216S105000, C438S690000, C438S696000, C438S754000, C438S759000, C438S678000, C438S687000, C427S097100, C427S098300
Reexamination Certificate
active
06426011
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of making a printed circuit board, and more particularly to a method of making a printed circuit board which enables the formation of a fine wiring pattern on the board's substrate.
BACKGROUND OF THE INVENTION
FIGS.
1
(A)-
1
(G) are diagrams showing a conventional method for fabricating a printed circuit board. FIG.
1
(A) will hereinafter be referred to as “step (A)”, FIG.
1
(B) as “step (B)”, etc. in the following description prior to the description of
FIGS. 2 and 3
. First, in step (A), a substrate
10
having a metal layer
12
(e.g., copper foil) on each of the surfaces thereof is prepared, and in step (B), a through hole
14
is formed in the substrate
10
, including through the copper foil. Then, in step (C), plating is performed to deposit a metal film
16
(e.g., copper) on the surfaces of the inner wall of the through hole
14
and the copper foil
12
. In step (D), the through hole
14
is filled with an insulating material
18
, such as a resin. Then, in step (E), plating is again performed to deposit a film
20
(e.g., copper) on the surfaces of the substrate
10
, including the top and bottom surfaces of the resin in through hole
14
. In step (F), the copper films
12
,
16
and
20
on the substrate
10
are patterned or circuitized to form a wiring pattern
23
. Following this, in step (G), a resin layer
24
is applied on the surfaces of the substrate
10
, and is patterned to form a via
26
as needed. Again, copper plating is performed to deposit a copper film on the resin layers
24
and is patterned to form a wiring pattern
28
. By repeating the application of the resin layer, and the plating and patterning of the copper film as needed, a wiring structure having multiple thin wiring layers can be provided.
According to the above conventional method, since the total thickness of the external copper material (layer) in step (E) is the total thickness of the individual copper films
12
,
16
and
20
, this copper layer cannot be finely patterned. If one tries to form a fine circuit pattern with small line-to-line spacings (gaps), the copper layer may be incompletely etched, as is indicated by a portion
22
in Step F. As a result, a short-circuit may occur in the wiring pattern. Further, in step (G), when the resin layer
24
is applied, air may be trapped in a small gap between the wiring conductors, such that an air bubble
30
may be formed. Such an air bubble may impair continuity of the resin layer
24
and its insulating properties. It has been found that such air entrapment is more likely to occur when the total thickness of the copper layer is greater than 25 &mgr;m.
OBJECTS AND SUMMARY OF THE INVENTION
It is, therefore, one object of the present invention to provide a method of making a printed circuit board in which a fine wiring pattern can be formed.
It is another object of the present invention to provide such a method of making a printed circuit board which can be performed in a facile manner.
According to one aspect of the invention, there is provided a method of making a printed circuit board comprising the steps of preparing a substrate having at least two opposing surfaces, providing an initial copper layer on each of the opposing surfaces, forming through holes, each having inner walls, in the substrate, treating the substrate with a catalyst to form a catalyzed layer on the substrate, including the inner walls of the through holes, and then plating the treated surfaces of the substrate with copper. The through holes are then filled with an insulating material, followed by thinning the copper layer on the at least one surface so that no part of the catalyst layer is exposed on the surface, removing any insulating material projecting from the surface of the thinned copper layer to thereby level the at least one surface, plating the at least one surface of the substrate and the insulating material with copper, and patterning the copper layer on the at least one surface to form a first wiring pattern.
REFERENCES:
patent: 4233344 (1980-11-01), Brasch
patent: 4810333 (1989-03-01), Gulla et al.
patent: 4847114 (1989-07-01), Brasch et al.
patent: 4976990 (1990-12-01), Bach et al.
patent: 5108786 (1992-04-01), Bayes
patent: 5425873 (1995-06-01), Blandon et al.
patent: 5483984 (1996-01-01), Donlan, Jr. et al.
patent: 5648125 (1997-07-01), Cane
patent: 5887345 (1999-03-01), Kulesza et al.
patent: 6013417 (2000-01-01), Sebesta et al.
patent: 6212769 (2001-04-01), Boyko et al.
patent: 6264851 (2001-07-01), Markovich et al.
patent: 06302963 (1994-10-01), None
patent: 10190221 (1998-07-01), None
Fraley Lawrence R.
Gulakowski Randy
International Business Machines - Corporation
Smetama J
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