Semiconductor device manufacturing: process – Semiconductor substrate dicing
Reexamination Certificate
2006-04-25
2006-04-25
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Semiconductor substrate dicing
C438S113000, C438S462000, C438S458000
Reexamination Certificate
active
07033914
ABSTRACT:
The present invention relates to a method of making a package structure by dicing a wafer from the backside surface thereof comprising: (a) providing a first wafer having a active surface, a backside surface and a plurality of scribe lines defining a plurality of chips, wherein each chip has an annular body thereon; (b) dicing the first wafer from the active surface to form a reference coordinate; (c) providing a second wafer; (d) covering and joining the second wafer to the first wafer to form a plurality of cavities; and (e) dicing the corresponding positions of the scribe lines of the first wafer from the backside surface thereof according to the predetermined distance from the reference coordinate so as to form an individual package structure. As a result, the manufacture time is reduced.
REFERENCES:
patent: 6297131 (2001-10-01), Yamada et al.
patent: 6528393 (2003-03-01), Tao
patent: 6869861 (2005-03-01), Glenn et al.
Advanced Semiconductor Engineering Inc.
Ladas & Parry
Thai Luan
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