Fishing – trapping – and vermin destroying
Patent
1994-06-20
1996-03-12
Fourson, George
Fishing, trapping, and vermin destroying
437 52, 257316, H01L 218247
Patent
active
054985595
ABSTRACT:
A nonvolatile memory includes five transistors. The memory has an MOS transistor in series with two pairs of transistors, where each pair includes a floating gate transistor and a metal-oxide-semiconductor transistor electrically connected in parallel. The memory structure may be formed with three levels of silicon-containing or metal-containing layers. The memory structure is less susceptible to read disturb errors compared to a prior art dual-bit nonvolatile memory structure.
REFERENCES:
patent: 5194925 (1993-03-01), Ajika et al.
patent: 5225362 (1993-07-01), Bergemont
patent: 5268319 (1993-12-01), Harari
patent: 5278087 (1994-01-01), Jeng
patent: 5278439 (1994-01-01), Ma et al.
Booth Richard A.
Fourson George
Meyer George R.
Motorola Inc.
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