Fishing – trapping – and vermin destroying
Patent
1986-08-21
1988-08-23
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 43, 437193, 437233, 437 49, 156653, H01L 2144
Patent
active
047660880
ABSTRACT:
A semiconductor memory device is provided with a memory region including SAMOS type memory transistors and a non-memory or peripheral region including MOS transistors which are interconnected to form logic circuits such as decoders for controlling the operation of each of said memory transistors. Each of the transistors includes a pair of first and second doped polysilicon layers and an interlayer insulating film provided as sandwiched between the pair of first and second doped polysilicon layers. In the memory region, the first and second doped polysilicon layers define floating and control gate electrodes, respectively; whereas, in the non-memory region, the first and second doped polysilicon layers are electrically interconnected by a through-the-layer electrode formed through the interlayer insulating film.
REFERENCES:
patent: 3986896 (1976-10-01), Ueno
patent: 4142926 (1979-03-01), Morgan
patent: 4178674 (1979-12-01), Liu et al.
patent: 4291328 (1981-09-01), Lien et al.
patent: 4373248 (1983-02-01), McElroy
patent: 4373249 (1983-02-01), Kasa et al.
patent: 4471373 (1984-09-01), Shimizu
patent: 4635347 (1987-01-01), Lien et al.
patent: 4646425 (1987-03-01), Owens et al.
Kono Satoshi
Kyomasu Mikio
Nomura Koshi
Hearn Brian E.
McAndrews Kevin
Ricoh & Company, Ltd.
LandOfFree
Method of making a memory device with polysilicon electrodes does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method of making a memory device with polysilicon electrodes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making a memory device with polysilicon electrodes will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-835737