Fishing – trapping – and vermin destroying
Patent
1991-01-11
1991-10-15
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 41, 437 44, 437 48, 437 50, 437190, 437913, 437 45, H01L 21265
Patent
active
050574450
ABSTRACT:
In a semiconductor device comprising a plurality of planar high-voltage insulated-gate field-effect transistors in which offset regions are provided in portions of the semiconductor substrate near the junctions of the adjacent drain regions and near the substrate surface, low impurity concentration offset regions are formed in the semiconductor substrate in such a manner that each low impurity concentration offset region is coupled the source region and is located between the drain regions of the field-effect transistors adjacent to each other and near the semiconductor surface, whereby reduction of the "on resistance" is achieved without affecting the FET sustaining voltage.
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Yatsuda Yuji
Yeh Ching F.
Hearn Brian E.
Hugo Gordon V.
Kyocera Corporation
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