Method of making a gate turn-off thyristor using a simultaneous

Details Method of making a gate turn-off thyristor using a simultaneous Method of making a gate turn-off thyristor using a simultaneous

1990-11-08

1992-01-14

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437139, 437152, H01L 4900, H01L 2122

Patent

active

050810502

ABSTRACT:
In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration.
The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.

REFERENCES:
patent: 3442722 (1969-05-01), Bauerlein et al.
patent: 3491272 (1970-01-01), Huth et al.
patent: 4264383 (1981-04-01), Ostop et al.
patent: 4290830 (1981-09-01), Mochizuki et al.
patent: 4377816 (1983-03-01), Sittig
patent: 4388635 (1983-06-01), Watanabe et al.
patent: 4402001 (1983-08-01), Momma et al.
patent: 4450469 (1984-05-01), Yamamoto
patent: 4630092 (1986-12-01), Bhagat
patent: 4672415 (1987-06-01), Berndes et al.
patent: 4804634 (1989-02-01), Krishna et al.
IEEE Transactions on Electron Devices, vol. ED-23, No. 8, Aug. 19.
IEE (N.Y., US) M. S. Adler et al., pp. 956-960.
International Journal of Electronics, vol. 54, No. 1, 1983 (London, GB) V. P. Sundersingh et al., pp. 127-137.
5th International Colloquium on Plasmas and Sputtering, Antibe (FR), Jun. 10-14, 1985 J. Voboril et al., pp. 89-92.
IEEE Electron Device Letters, vol. EDL-1, No. 10, Oct. 1980, IEEE (N.Y., US) M. Azuma et al., pp. 203-205.
Brown Boveri Technik 9, 1986, pp. 519-525.
IEEE Transactions on Electron Devices, vol. ED-28, No. 3, Mar. 1981, M. Azuma et al., pp. 270-274.

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