Fishing – trapping – and vermin destroying
Patent
1993-06-09
1996-10-08
Quach, T. N.
Fishing, trapping, and vermin destroying
437228, 437912, 437978, H01L 21338
Patent
active
055630790
ABSTRACT:
A method of making a FET includes the steps of forming a source and a drain at respective edges of the surface of a semiconductor substrate, forming a first insulation film on the whole surfaces of the semiconductor substrate, the source, and the drain, coating a photoresist on the first insulation film, patterning the photoresist using a photolithography process to form a photoresist pattern having a first space corresponding to a gate length between the source and the drain, forming a second insulating film on the whole surfaces of the exposed first insulation film and the photoresist pattern, etching the second insulation film to form sidewall insulation films at the sidewalls of the photoresist patterns, etching the first insulation film using the sidewall insulation films and the photoresist pattern as an etching mask to form first insulation film patterns, which form a second space having a width smaller than that of the first space, beneath the first space, removing the sidewall insulation films to form a T-shaped space, and depositing a conductor to form a T-shaped gate in the T-shaped space.
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patent: 5182218 (1993-01-01), Fujihira
Wolf et al., Silicon Processing, vol. 1, Lattice Press, 1986, pp. 194, 407-455, 532-547.
Kim Chang T.
Kwon Young S.
Shin Jin H.
Goldstar Co. Ltd.
Quach T. N.
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