Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Patent
1995-06-07
1997-05-13
Tsai, Jey
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
438739, H01L 2170, H01L 2700
Patent
active
056292252
ABSTRACT:
A manufacturing method for a dynamic RAM containing a screen-type structure cylindrical stack cell capacitor. An SiO.sub.2 layer 22 is formed on a polysilicon layer 11 (or a semiconductor substrate 1) to serve as a preform or spacer. A nitride layer 31 is stacked on this SiO.sub.2 layer, and nitride layer 31 and SiO.sub.2 layer 22 are worked into virtually the same pattern. Then the outside surface of SiO.sub.2 layer 22 is etched using nitride layer 31 as a mask, causing the nitride layer 31 to form a lateral projection structure 31A in the region removed by the etching. A polysilicon layer 23 is adhered to the top of silicon layer 11, which serves as a capacitor lower electrode, from the top of nitride layer 31 and SiO.sub.2 layer 22, including this projected portion. Polysilicon layer 23 is etched to leave a portion of polysilicon layer 23 on the outside surface of SiO.sub.2 layer 22 directly beneath the projecting portion 31A of nitride layer 31.
REFERENCES:
patent: 5164337 (1992-11-01), Ogawa et al.
patent: 5436187 (1995-07-01), Tanigawa
Enomoto Osaomi
Hirose Kiyomi
Iwakiri Takashi
Okumoto Yasuhiro
Shinozuka Hiroto
Donaldson Richard L.
Kempler William B.
Texas Instruments Incorporated
Tsai Jey
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