Method of making a conductive path in multi-layer metal structur

Metal treatment – Compositions – Heat treating

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

29574, 29576B, 29578, 148187, 357 91, H01L 21265, B23K 2700

Patent

active

045854904

ABSTRACT:
An integrated circuit device including a link point for electrically connecting a plurality of metal layers, comprising a first metal layer, a link insulating layer, a second metal layer and diffusion barrier layers between the link insulator layer and each of the first metal layer and the second metal layer. The metal layers are connected by exposing the link point to a low-power laser for a relatively long pulse width.

REFERENCES:
patent: 3771026 (1973-11-01), Asai et al.
patent: 4023005 (1977-05-01), Bolin
patent: 4151545 (1979-04-01), Schnepf et al.
patent: 4168444 (1979-09-01), van Santen
patent: 4177474 (1979-12-01), Ovshinsky
patent: 4190855 (1980-02-01), Inoue
patent: 4270137 (1981-05-01), Coe
patent: 4270960 (1981-06-01), Bollen et al.
patent: 4272775 (1981-06-01), Compton et al.
patent: 4275410 (1981-06-01), Grinberg et al.
patent: 4289834 (1981-09-01), Alcorn et al.
patent: 4335362 (1982-06-01), Salathe' et al.
patent: 4372989 (1983-02-01), Menzel
patent: 4387503 (1983-06-01), Aswell et al.
patent: 4398343 (1983-08-01), Yamazaki
patent: 4413272 (1983-11-01), Mochizuki et al.
patent: 4437109 (1984-03-01), Anthony et al.
patent: 4438450 (1984-03-01), Sheng et al.
patent: 4446613 (1984-05-01), Beinglass et al.
patent: 4456490 (1984-06-01), Dutta et al.
patent: 4462150 (1984-07-01), Nishimura et al.
patent: 4467312 (1984-08-01), Komatsu
Aggarwal, B. K., IBM-TDB, 21 (1979) 3271.
Drowley et al. in Laser-Solid Interactions . . . Materials Ed (J. Narayan et al.), North-Holland, N.Y. 1982, p. 529.
O. Minato, et al., "A High-Speed Hi-CMOSII 4K Static RAM", pp. 449-453, IEEE Journal of Solid-State Circuits, v. SC-16, No. 5, Oct. 1981.
J. M. Harris et al., "Solid-Phase Crystallization of Si Films in Contact with Al Layers", pp. 2897-2904, Journal of Applied Physics, V. 48, No. 7, Jul., 1977.
M. Hongo, et al., "THD2 Connecting Conductors on Semiconductor Devices by Lasers" Hitachi, Ltd. 4/15/82.
J. I. Raffel et al., "Laser Programmed Vias for Restructurable VLSI*", pp. 132-135, Int'l Electron Devices Meeting, 12/1980.
J. G. Posa, "Redundancy-What to do When the Bits go Out", 7/28/81, pp. 117-120, Electronics.
G. H. Chapman et al., "A Laser Linking Process for Restructurable VLSI*", MIT, CLEO '82, 4/14-16/82, Phoenix, Ariz.
J. F. Smith et al., "Laser Induced Personalization & Alterations of LSI & VLSI Circuits", IBM Corporation.
E. E. Conrad, "Aluminum-Copper-Silicon Semiconductor Metallurgy", IBM Technical Disclosure Bulletin, vol. 13 (1971), p. 3661.
J. Leff, "Aluminum-Silicon Conductor Formation", IBM Technical Disclosure Bulletin, vol. 12 (1970), p. 1996.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of making a conductive path in multi-layer metal structur does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making a conductive path in multi-layer metal structur, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making a conductive path in multi-layer metal structur will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-139895

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.