Method of making a bipolar transistor with double diffused isola

Details Method of making a bipolar transistor with double diffused isola Method of making a bipolar transistor with double diffused isola

1987-11-12

1988-10-25

Hearn, Brian E.

Fishing, trapping, and vermin destroying

148DIG11, 148DIG35, 148DIG38, 357 34, 357 48, 437 76, 437149, 437152, 437154, 437166, 437953, H01L 2120, H01L 2704

Patent

active

047804254

ABSTRACT:
The present invention relates to a semiconductor device and a method of producing the same. According to this method, a lower diffusion layer of a double isolation diffusion area is attached to a surface of a substrate, an epitaxial layer being formed on the lower diffusion layer, the lower diffusion layer being largely outdiffused upwardly in the epitaxial layer and simultaneously an element diffusion area being deeply diffused from a surface of the epitaxial layer, and then an upper diffusion layer of the double isolation diffusion area being shallowly diffused from the surface of the epitaxial layer. Thus, the lateral expansion of the upper diffusion layer of the double isolation diffusion area can be suppressed and the integrated extent can be improved. On the other hand, in a semiconductor device of the present invention, the above described double isolation diffusion area is formed and a collector area, a base area and an emitter area are formed all over the width of the epitaxial layer (the base area and the emitter area are formed by a double diffusion). In addition, it includes a vertical type transistor whose fluctuation of a width of the base area is reduced, so that the transition frequency f.sub.T and current gain h.sub.FE of this transistor are increased.

REFERENCES:
patent: 3911470 (1975-10-01), Ruegg
patent: 3930909 (1976-01-01), Schmitz et al.
patent: 3969748 (1976-08-01), Horie et al.
patent: 4038680 (1977-07-01), Yagi et al.
patent: 4260999 (1981-04-01), Yoshioka

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