Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Reexamination Certificate
2005-11-22
2005-11-22
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
C438S053000, C438S456000, C438S459000, C438S462000, C438S928000, C438S975000, C438S977000, C257SE23193
Reexamination Certificate
active
06967145
ABSTRACT:
A method of maintaining photolithographic precision alignment for a wafer after being bonded, wherein two cavities are formed at the rear surface of a top wafer at the position corresponding to alignment marks made on a bottom wafer. The depth of both cavities is deeper than that of a final membrane structure. The top wafer is then bonded to the bottom wafer which already has alignment marks and a microstructure. This bonded wafer is annealed to intensify its bonding strength. After that, a thinning process is applied until the thickness of the top wafer is reduced to thinner than the cavity depth such that the alignment marks are emerged in the top wafer cavities thereby serving as alignment marks for any exposure equipment.
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Chan Kuo-Chung
Gong Shih-Chin
Huang Reuy-shing
Lee Tong-An
Tseng Chung-Yang
Asia Pacific Microsystems, Inc.
Fourson George
Pham Thanh V.
Troxell Law Office PLLC
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