Method of maintaining continuity of sample jitter pattern...

Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors

Reexamination Certificate

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C345S564000, C345S506000

Reexamination Certificate

active

06943796

ABSTRACT:
A system and method are disclosed to allow the tiling of sample jitter patterns to be independent of the tiling of clustered graphics accelerators. Each accelerator uses an x,y “bias” offset to shift the origin of the jitter pattern within the sample space region addressed by the accelerator. In this way, multiple accelerators may be programmed so that their jitter patterns integrate into one global pattern without discontinuities at the region boundaries.

REFERENCES:
patent: 6417861 (2002-07-01), Deering et al.
patent: 6459428 (2002-10-01), Burk et al.
patent: 6501483 (2002-12-01), Wong et al.
patent: 6885384 (2005-04-01), Deering et al.
patent: 2002/0000988 (2002-01-01), Nelson et al.
patent: 2002/0050979 (2002-05-01), Oberoi et al.

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