Method of locking a master oscillator in a narrowband phase-lock

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 4, H03L 700

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active

046425764

ABSTRACT:
In satellite telephone communication equipment, the phase detector of a phase-lock loop compares the phase of a master oscillator signal from the loop oscillator with that of a pilot tone signal and produces an error control voltage which it combines with a constant sweep voltage that is stepped at a variable rate. When the loop is out of lock, a first count of the number of excursions of the beat or difference frequency signal from the phase detector that exceed a prescribed threshold level is generated, a second count is incremented for every n counts in the first count, and a constant amplitude step of the stepped sweep voltage is produced for each unique value of the second count. The steps in the sweep voltage occur at a variable rate that is related to the difference frequency of the beat signal. Since the difference between the oscillator and pilot frequencies decreases as the loop approaches lock, the rate at which the sweep voltage is stepped also decreases. When the loop is locked, the sweep voltage is maintained at a constant value so that the output signal of the phase detector is the conventional loop error control voltage superimposed on a constant value of sweep voltage.

REFERENCES:
patent: 4007429 (1977-02-01), Cadalora et al.
patent: 4130808 (1978-12-01), Marzalek

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